Renesas Electronics /R7FA2E2A7 /SYSC /LPOPT

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Interpret as LPOPT

7 43 0 0 00 0 0 0 0 0 0 0 0 (0)MPUDIS 0 (00)DCLKDIS 0 (0)BPFCLKDIS 0 (0)LPOPTEN

MPUDIS=0, DCLKDIS=00, LPOPTEN=0, BPFCLKDIS=0

Description

Lower Power Operation Control Register

Fields

MPUDIS

MPU Clock Disable Control

0 (0): MPU operates as normal

1 (1): MPU operate clock stops (MPU function disable).

DCLKDIS

Debug Clock Disable Control

0 (Others): Debug clock stops (valid only when LPOPT.LPOPTEN = 1)

0 (00): Debug clock does not stop

BPFCLKDIS

BPF Clock Disable Control

0 (0): Flash register R/W clock operates as normal

1 (1): Flash register R/W clock stops.

LPOPTEN

Lower Power Operation Enable

0 (0): All lower power counter measure disable

1 (1): All lower power counter measure enable

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